1. Field of the Invention
The present invention relates to controllers that control data writing to semiconductor devices, and more particularly, to a data rewriting method that can recover data, even if power turns off in process of writing and the data processing is interrupted.
2. Description of the Related Art
FIG. 1 shows a system structure in which the data is stored and managed in a non-volatile semiconductor memory device such as flash memory. In the system structure shown in FIG. 1, a CPU 1 writes data into a RAM 6 or a flash memory 8 by way of a data bus 11, and reads data or a program out of a ROM 4, the RAM 6, or the flash memory 8. Also, the CPU 1 sends address information through an address bus 10 in order to read the data from the flash memory 8.
A ROM controller 3 outputs the data in the ROM 4 onto a data bus 11, and reads the address information on the address bus 10 into the ROM 4. In the same manner, a RAM controller 5 outputs data in the RAM 6 onto the data bus 11, and reads the data on the data bus 11 into the ROM 4. Also, the RAM controller 5 reads the address information output onto the address bus 10 into the RAM 6. In the same manner, a flash controller 7 outputs data in the flash memory 8 onto the data bus 11, and reads the data output onto the data bus 11 into the flash memory 8. Also, the flash controller 7 reads the address information output onto the address bus 10 into the flash memory 8.
In addition, as shown in FIG. 1, a main buttery 2 is provided for supplying the power to the CPU 1, the ROM 4, the RAM 6, and the flash memory 8.
A description will be given of a procedure of rewriting the data stored in the flash memory 8, with reference to FIGS. 2 and 3. FIG. 2 is a flowchart showing the procedure of rewriting the data. FIG. 3 shows structures of the flash memory 8 and an address management table. The address management table manages physical addresses of the flash memory 8 and virtual addresses used in the CPU 1. FIG. 3 also shows the procedure of rewriting the data with the aforementioned addresses. Here, the virtual address denotes a virtually given address when the CPU 1 manages the memories. The address management table translates the virtual address of the memory into the actual physical address.
First, a write start status is set to a flag that shows the status of an area in which the data is to be stored (step S1). As shown in FIG. 3, the flash memory 8 includes a data memory area and a status flag (management) area. The actual data is written into the data memory area, and the status flag area indicates the status of the data memory area. Status flags include an empty flag, a write start flag, a completion of writing flag, and an erased flag. The empty flag indicates that the data is not written and the data memory area is empty. The write start flag indicates that the data memory area is in process of rewriting. The completion of writing flag indicates that writing has been completed. The completion of erasing flag indicates that the data has been erased virtually. When the flag indicating the status of the data memory area is set to the write start flag, the corresponding data memory area is recognized as in process of rewriting the data.
The actual data in written after the status flag is written (step S2). Here, for example, a data “abz” is written, as shown in FIG. 3.
Then, the address information is changed (step S3). The physical address of the flash memory 8 associated with the virtual address is registered in the address management table, as shown in FIG. 3. The physical address associated with the virtual address is changed from the physical address of the data before rewriting to that of the data after rewriting. In this step, the effective data is changed from the data before rewriting to the data after rewriting.
Next, the completion of writing flag is written (step S4). The status flag of the data memory area into which the data has been written is set to the completion of writing flag. When the flag indicating the status of the data memory area is set to the completion of writing flag, the corresponding data memory area is recognized that the data rewriting is completed.
Next, the status flag of the data memory area, into which old data (“abc” shown in FIG. 3) is written, is changed to the erased flag from the completion of writing flag. After the flag is changed to the erased status, the data is recognized as invalid at a garbage collection process, as will be described later, and the data is thus erased actually.
Japanese Patent No. 2582487 (hereinafter, referred to as Document 1) describes that the file can be recovered by recording the statuses of the multiple sectors included in the memory block in the sector management table. If the power turns off in process of writing, the file can be recovered with the data of the sector in which the status indicates invalid.
However, on the above-mentioned data rewriting procedure, if the power supply from the main buttery 2 stops in process of rewriting the data, both of the data before rewriting and the data after rewriting are recognized as valid data. That is, on the above-mentioned data rewriting procedure, if the power turns off after the step S4 is completed, the process is stopped in the condition that the data before rewriting and the data after rewriting have both the statuses of the completion of writing flags. So, the above-mentioned data are both judged valid, because the data is judged whether the data is valid or invalid on the basis of the status flag in the garbage collection process. This causes a problem in that the data memory area including an invalid old data cannot be reproduced into a new area having the status into which the data can be written.
In the garbage collection process, only the data having the completion of writing flag is copied to a spare sector of the flash memory 8 shown in FIG. 4A. Referring to FIG. 4B, if the copy of the data having the completion of writing flag is completed, the original sector of the copy is erased, as shown in FIG. 4C. Therefore, the invalid data “abc” is also copied to the spare sector, and the invalid data cannot be erased.
If all of the areas in the flash memory 8 are searched for the data of the physical address to which the virtual address is not assigned, referring to the address management table shown in FIG. 3, it will be possible to search the invalid data. However, it takes time to perform the process.
Besides, the data is managed for every sector with the sector management table in Document 1, and it is not possible to determine the data whether the data is valid or invalid in a smaller unit than the sector.
Moreover, the sector management table is referred and the data in the invalid sector is searched, if the power turns off in process of writing. Then, the data of the searched sector is rewritten into valid. That is, whenever the power is off in process of writing, the old data is set to valid and the new data is set to invalid. In other words, the data writing is started again from the beginning, and the data writing cannot be restarted from the previous process when the power turns off.